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8th International Workshop on
Software and Compilers for Embedded Systems
SCOPES 2004
Workshop Program - Presentation Abstract
| Compact Procedural Implementation in DSP Software Synthesis through Recursive Graph Decomposition |
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| Ming-Yung Ko - Department of Electrical and Computer Engineering,
and Institute for Advanced Computer Studies, University of Maryland at
College Park, USA Praveen Murthy - Fujitsu Laboratories of America, Sunnyvale, California, USA Shuvra Bhattacharyya - Department of Electrical and Computer Engineering, and Institute for Advanced Computer Studies, University of Maryland at College Park, USA |
| Synthesis of digital signal processing (DSP) software from data-flow-based formal models is an effective approach for tackling the complexity of modern DSP applications. In this paper, an efficient method is proposed for ap-plying subroutine call instantiation of module functionality when synthesizing embedded software from a dataflow specification. The technique is based on a novel recursive decomposition of subgraphs in a cluster hierarchy that is opti-mized for low buffer size. Applying this technique, one can achieve significantly lower buffer sizes than what is available for minimum code size inlined sched-ules, which have been the emphasis of prior software synthesis work. Further-more, it is guaranteed that the number of procedure calls in the synthesized pro-gram is polynomially bounded in the size of the input dataflow graph, even though the number of module invocations may increase exponentially. This re-cursive decomposition approach provides an efficient means for integrating sub-routine-based module instantiation into the design space of DSP software synthe-sis. The experimental results demonstrate a significant improvement in buffer cost, especially for more irregular multi-rate DSP applications, with moderate code and execution time overhead. |
Presentation
