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8th International Workshop on
Software and Compilers for Embedded Systems
SCOPES 2004
Workshop Program - Presentation Abstract
| Instruction Selection for Compilers that Target Architectures with
Echo Instructions |
Philip Brisk - University of California, Los Angeles
Ani Nahapetian - University of California, Los Angeles
Majid Sarrafzadeh - University of California, Los Angeles
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| Echo Instructions have recently been introduced to allow embedded
processors to provide runtime decompression of LZ77-compressed programs
at a minimal hardware cost compared to other recent decompression
schemes. As embedded architectures begin to adopt echo instructions, new
compiler techniques will be required to perform the compression step.
This paper describes a novel instruction selection algorithm that can be
integrated into a retargetable compiler that targets such architectures.
The algorithm uses pattern matching to identify repeated fragments of
the compilers intermediate representation of a program. Identical
program fragments are replaced with echo instructions, thereby
compressing the program. The techniques presented here can easily be
adapted to perform procedural abstraction, which replaces repeated
program fragments with procedure calls rather than echo instructions.
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Presentation
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