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8th International Workshop on
Software and Compilers for Embedded Systems
SCOPES 2004
Workshop Program
Wednesday evening: Opening Reception, starting at 17.00
until 19.00
Registration desk is open for picking up workshop
materials and your badge on:
Wednesday evening from 17.00 - 18.00 and Thursday morning from 8.00 - 9.00.
Thursday, September 2, 2004
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Friday, September 3, 2004
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| 09.00 - 09.15 Opening by Program
Chairs
09.15 - 10.30 Keynote
The New Economics of Embedded Systems
(Michael Uhler, CTO, MIPS Technologies) |
09.00 - 10.30 Session on Data
Partitioning
- Athanasios Milidonis, Grigoris Dimitroulakos, Michalis Galanis,
George Theodoridis, Francky Catthoor, Costas Goutis,
An Automated C++ Code and Data
Partitioning Framework for Data Management of Data-Intensive
Applications
- Heiko Falk, Manish Verma,
Combined Data Partitioning and Loop Nest Splitting for Energy
Consumption Minimization
- Bernhard Wess, Thomas Zeitlhofer,
On the phase coupling problem between data
memory layout generation and address pointer assignment
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| Coffee break |
Coffee break |
11.00 - 12.30 Session on Application
Specific (Co) Design
- Daniela Peixoto, Diogenes Silva Junior,
A framework for architectural description
of embedded systems
- Diviya Jain, Laura Pozzi, Paolo Ienne, Anshul Kumar,
Automatically Customizing VLIW
Architectures with Coarse Grained Application-specific Functional
Units
- Hanno Scharwaechter, David Kammler, Andreas Wieferink, Manuel
Hohenauer, Rainer Leupers, Heinrich Meyr,
Architecture Exploration for Efficient
IPsec Encryption: A Case Study
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11.00 - 12.30 Session on Task
Scheduling
- Peng Yang, Francky Catthoor,
Dynamic Mapping and Ordering Tasks of Embedded Real-Time Systems on
Multiprocessor Platforms
- Yudong Tan, Vincent Mooney,
Integrated Intra- and Inter-Task Cache Analysis for Preemptive
Multi-tasking Real-Time Systems
- Susmit Bagchi, Mads Nygaard, A
Fuzzy Adaptive Algorithm for Fine Grained Disk Cache Paging |
| Lunch |
Lunch |
14.00 - 15.30 Session on System &
Application Synthesis
- Ming-Yung Ko, Praveen Murthy, Shuvra Bhattacharyya,
Compact Procedural Implementation in DSP
Software Synthesis Through Recursive Graph Decomposition
- Alexandru Turjan, Bart Kienhuis, Ed Deprettere,
An Approach to Classify Inter-Process
Communication in Process Networks at Compile Time
- Marco Bekooij, Orlando Moreira, Peter Poplavko, Bart Mesman,
Milan Pastrnak, Jef van Meerbergen,
Predictable Multiprocessor System Design
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14.00
- 15.00 Panel 2
Will compilers determine future architectures?
Chair - Rainer Leupers, RWTH Aachen
Members - Lex Augusteijn, Philips - Vinod Kathail, Synfora - Peter
Marwedel, Univ. of Dortmund. |
| Afternoon break |
Afternoon break |
16.00 - 17.00 Session on Data Flow
Analysis
- Adrian Johnstone, Elizabeth Scott,
Suppression of redundant operations in
reverse compiled code using global dataflow analysis
- Michael Jung, Sorin Huss, Fast
Points-to Analysis for Languages with Structured Types
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15.30-
17.00 Session on Code
Generation
- Daniel Menard, Olivier Sentieys,
DSP Code Generation with Optimized Data Word-Length Selection
- Philip Brisk, Ani Nahapetian, Majid Sarrafzadeh,
Instruction Selection for Compilers that
Target Architectures with Echo Instructions
- Sheayun Lee, Jaejin Lee, Chang Yun Park, Sang Lyul Min,
A Flexible Tradeoff between Code Size and
WCET Using a Dual Instruction Set Processor
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17.00 - 18.00 Panel 1
Future of embedded system programming: evolution or revolution?
Chair - Martijn de Lange, ACE
Members - Mike Uhler, MIPS - Masahura Imai, Osaka Univ. - Pierre
Paulin, ST - Vincent Korstanje, ARM.
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17.00 - 17.15 Best Paper Award by
Program Chairs
17.15 - 17.30 Next SCOPES by Peter Marwedel |
| 19.00 Dinner |
17.30 Closing |
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